Wisconsin Alumni Research Foundation

Information Technology
Information Technology
Memory System And Method For Error Correction Of Memory
WARF: P150081US01

Inventors: Nam Sung Kim, Jung-Ho Ahn


The Invention
A memory system and a method for the error correction of memory are disclosed herein. The method for the error correction of memory is performed by a memory system including a plurality of memory chips. The method for the error correction of memory may include reading, by a first ECC engine unit included in each of a plurality of memory chips, a chunk including a plurality of data bursts, first parity bits, and position bits from each of the plurality of memory chips; extracting, by the first ECC engine unit, a single data burst having an error from the plurality of data bursts using the position bits; and performing, by the first ECC engine unit, first error correction using the first parity bit corresponding to the extracted error data burst.
For current licensing status, please contact Jeanine Burmania at [javascript protected email address] or 608-960-9846

WARF